GitHub

Constructing a 2 Input XOR Gate Using Skywater 130nm CMOS Technology

This repo deals with the construction of a 2-input XOR gate using CMOS Skywater 130nm technology in xschem & obtaining its parameters through pre-layout simulation using ngspice.

Virtus Ceredex Mid-Cap Value Equity Fund Q3 2025 Commentary

Discover how the Virtus Ceredex Mid-Cap Value Equity Fund returned +9.29% this quarter, driven by AI exuberance and strategic ...
IEEE

A Novel Power Splitting for 1.2–5.7-GHz Dual-Input Power Amplifier Using Sigmoid Function and Nonlinear Support Vector Machin

Abstract: This study introduces a novel splitting function for the multimode dual-input power amplifier (PA) with the proposed optimization supported by a nonlinear support vector machine (SVM). The ...
IEEE

Efficient Circuit Performance Prediction Using Machine Learning: From Schematic to Layout and Silicon Measurement with Minimal Data Input

Abstract: We present an ML-driven framework for predicting circuit performance metrics, bridging the gap between schematic and layout simulations, multi-process corner analysis, and measured silicon ...
GitHub

It is the final project repo for EE4321 VLSI.

vscode is a good way to make changes to any no_gui files. Check: https://blog.csdn.net/qq812457115/article/details/135533373 When pulling new schematic files or any ...